Scientific Research Publishing

Mungkasi, S. (2021) Variational Iteration and Successive Approximation Methods for a SIR Epidemic Model with Constant Vaccination Strategy. Applied Mathematical Modelling, 90 ...

ABSTRACT: In this paper, we establish an SIR reaction-diffusion infectious disease model with saturated incidence rate and vaccination. Firstly, we prove the uniform boundedness of the solution of ...
IEEE

A 5-MS/s 16-bit Low-Noise and Low-Power Split Sampling SAR ADC With Eased Driving Burden

Abstract: This article presents a 16-bit 5-MS/s successive approximation register (SAR) analog-to-digital converter (ADC) with the proposed split sampling (SS) technique. The SS decouples the sampling ...
Business Wire

Analog Devices’ New Easy Drive™ SAR ADCs Simplify Design While Delivering Industry Leading Performance

WILMINGTON, Mass.--(BUSINESS WIRE)--Analog Devices, Inc. (Nasdaq: ADI) today introduced a new portfolio of next-generation 16-to-24-bit, ultra-high precision successive approximation register (SAR) ...
EDN

Challenges & Requirements: Voltage Reference Design for Precision Successive-Approximation ADCs, Part 1

Editor's note: We will publish this article in four sequential parts leading up to our “Ask the experts” session on Precision Voltage References on May 21. Alan Walsh will be one of our experts. The ...
IEEE

Jittered random sampling with a successive approximation ADC

Abstract: This paper proposes a randomly jittered temporal sampling scheme with a successive approximation register (SAR) ADC. The sampling time points are jittered around a uniform sampling clock. A ...
EDN

“Golden Gloves” A/D Converter Match, Round 2: Successive-approximation register vs. sigma-delta topology–Power Efficiency

After the seven-round fight back in April 2010 between the successive-approximation register (SAR) analog/digital converter (ADC) and the sigma-delta (S?) ADC, Figure 1, (click here to see the full ...