TMCnet

Modus Test Partners with yieldWerx to Deliver Closed-Loop Socket to Silicon Correlation

yieldWerx provides a semiconductor yield management platform that enables manufacturers to collect, analyze, and act on production data across the manufacturing lifecycle. The platform consolidates ...
EDN

New Cadence Modus Test Solution Delivers Up to 3X Reduction in SoC Test Time

“Our next-generation Modus Test Solution delivers new, innovative patent-pending technology that fundamentally changes the way design and test engineers address the test problem,” said Dr. Anirudh ...
EDN

Cadence Modus Test Solution Enables Support for Safety-Critical SoC Designs Using ARM MBIST Interface

Through Cadence's support of the ARM MBIST interface, customers can deliver innovative SoC designs to market faster and with better power, performance and area (PPA). For example, the Modus Test ...
CNN

AltaSens Adopts Cadence Modus Test Solution for Mixed-Signal Image Sensor Designs

Cadence Modus Test Solution's seamless integration with digital and verification tools enabled AltaSens to meet test coverage goals and save weeks on design convergence SAN JOSE, Calif., Jan. 11, 2017 ...
Semiconductor Engineering

Beyond The Bottleneck: 3 Breakthroughs In High-Throughput Connector Testing

In any production environment, testing components quickly and accurately is a dual challenge. A solution from Modus Test addresses this by combining an MPT tester with an MTC cycler —a setup that ...
Semiconductor Engineering

Maximize Your Revenue With High-Speed Test Performance Optimization

In today’s competitive semiconductor market, revenue growth is often associated with design innovation, process advancements, ...
Electronic Design

Automotive semiconductor test key topic at ITC

When the 2016 International Test Conference convened in November in Fort Worth, TX, automotive semiconductor test was the key topic, with a special technical session on the subject including ...
Design-Reuse

New Cadence Modus Test Solution Delivers Up to 3X Reduction in SoC Test Time

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the new Modus™ Test Solution that enables design engineers to achieve an up to 3X reduction in test time, thereby reducing production test ...
Design-Reuse

Cadence Modus Test Solution Enables Support for Safety-Critical SoC Designs Using Arm MBIST Interface

SAN JOSE, Calif., Nov. 14, 2016 – Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence ® Modus ™ Test Solution now supports the Arm ® Memory Built-In Self Test (MBIST) ...