Optimize ASIC test suites using code-coverage analysisMartin Abrahams, TransEDA Ltd, and Stuart Riches, Texas Instruments LtdPerforming code-coverage analysis of HDL code before synthesis saves time ...
Many developers employ code coverage tools but handle requirements coverage in an ad hoc fashion. This often parallels their system design approach, which often follows informal methodologies, if any.
When asked, many engineers will say that the goal of a test plan for a PCB is full or 100% test coverage. When pressed further, they usually admit that 100% test coverage is virtually impossible to ...
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